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» Variation Analysis of CAM Cells
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DAC
2006
ACM
14 years 8 months ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
ISCAS
2007
IEEE
138views Hardware» more  ISCAS 2007»
14 years 1 months ago
Highly Linear Bipolar Transconductor For Broadband High-Frequency Applications with Improved Input Voltage Swing
—An all n-p-n highly linear wide-bandwidth bipolar transconductor (Gm) stage is presented based on a variation of Caprio’s Quad. The high-frequency (HF) linearity of the improv...
Hsuan-Yu Marcus Pan, Lawrence E. Larson
SOCC
2008
IEEE
169views Education» more  SOCC 2008»
14 years 1 months ago
A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies
— Lowering supply voltage is an effective technique for power reduction in memory design, however traditional memory cell design fails to operate, as shown in [3], [10], at ultra...
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Sar...
WIOPT
2010
IEEE
13 years 5 months ago
Spatial queueing analysis for mobility in pico cell networks
In this work, we characterize the performance of pico cell networks in presence of moving users. We model various traffic types between base-stations and mobiles as different typ...
Sreenath Ramanath, Veeraruna Kavitha, Eitan Altman
ISCAS
2003
IEEE
131views Hardware» more  ISCAS 2003»
14 years 19 days ago
Process variation dimension reduction based on SVD
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
Zhuo Li, Xiang Lu, Weiping Shi