Sciweavers

44 search results - page 1 / 9
» Variation-Aware Application Scheduling and Power Management ...
Sort
View
ISCA
2008
IEEE
89views Hardware» more  ISCA 2008»
14 years 5 months ago
Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors
Within-die process variation causes individual cores in a Chip Multiprocessor (CMP) to differ substantially in both static power consumed and maximum frequency supported. In this ...
Radu Teodorescu, Josep Torrellas
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
14 years 5 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
ICCD
2006
IEEE
126views Hardware» more  ICCD 2006»
14 years 7 months ago
Task Merging for Dynamic Power Management of Cyclic Applications in Real-Time Multi-Processor Systems
—In this paper we propose the method of task merging and idle period clustering for dynamic power management (DPM) in a real-time system with multiple processing elements. We sho...
Shaobo Liu, Qinru Qiu, Qing Wu
PCI
2005
Springer
14 years 4 months ago
TSIC: Thermal Scheduling Simulator for Chip Multiprocessors
Abstract. Increased power density, hot-spots, and temperature gradients are severe limiting factors for today’s state-of-the-art microprocessors. However, the flexibility offer...
Kyriakos Stavrou, Pedro Trancoso
IEEEPACT
2008
IEEE
14 years 5 months ago
Multi-optimization power management for chip multiprocessors
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
Ke Meng, Russ Joseph, Robert P. Dick, Li Shang