163 search results - page 29 / 33 » Variation-aware routing for FPGAs |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
RSP
1999
IEEE
13 years 11 months ago
1999
IEEE
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
SLIP
2009
ACM
14 years 2 months ago
2009
ACM
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...