61 search results - page 1 / 13 » Verification Environment for a SCMP Architecture |
IMSCCS
2006
IEEE
14 years 1 months ago
2006
IEEE
The computer architecture of Single-chip multiprocessor (SCMP) is one of important research topics in developing the next-generation of computer hardware. A verification environme...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Functional and timing verification are currently the bottlenecks in many design efforts. Simulation and emulation are extensively used for verification. Formal verification is now...
HVC
2007
Springer
13 years 11 months ago
2007
Springer
Implementations of computer systems comprise many layers and employ a variety of programming languages. Building such systems requires support of an often complex, accompanying too...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Concurrent verification of hardware and software as part of the development process can shorten the time to market of complex systems. The objectives of the Virtual CPU approach i...