Using a variant of Clariso-Cortadella's parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of so...
The application of formal methods to analog and mixed signal circuits requires efficient methods tructing abstractions of circuit behaviors. This paper concerns the verification o...
Goran Frehse, Bruce H. Krogh, Rob A. Rutenbar, Ode...
Chips manufactured in 90 nm technology have shown large parametric variations, and a worsening trend is predicted. These parametric variations make circuit optimization difficult ...
Jinjun Xiong, Vladimir Zolotov, Natesan Venkateswa...
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...