584 search results - page 13 / 117 » Verification-Aware Microprocessor Design |
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
Abstract--This paper presents a method for automatic microarchitectural pipelining of systems with loops. The original specification is pipelined by performing provably-correct tra...
DAC
2000
ACM
14 years 10 months ago
2000
ACM
PDPTA
2003
13 years 10 months ago
2003
The performance of the data memory hierarchy is extremely important in current and near future high performance superscalar microprocessors. To address the memory gap, computer de...
ISCA
2011
IEEE
13 years 19 days ago
2011
IEEE
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
CASES
2006
ACM
14 years 20 days ago
2006
ACM
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...