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» Verification-Aware Microprocessor Design
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EUROPAR
2004
Springer
14 years 20 days ago
Imprecise Exceptions in Distributed Parallel Components
Abstract. Modern microprocessors have sacrificed the exactness of exceptions for improved performance long ago. This is a side effect of reordering instructions so that the micropr...
Kostadin Damevski, Steven G. Parker
SIGCSE
2002
ACM
201views Education» more  SIGCSE 2002»
13 years 8 months ago
A microprocessor survey course for learning advanced computer architecture
A course that surveys state-of-the-art microprocessors offers an excellent forum for students to see how computer architecture techniques are employed in practice and for them to ...
Kevin Skadron
ASPDAC
2009
ACM
127views Hardware» more  ASPDAC 2009»
13 years 10 months ago
A criticality-driven microarchitectural three dimensional (3D) floorplanner
- As technology scales, interconnect delays begin to dominate the performance of modern microprocessors. The ability to reduce the length of global wires has become an important de...
Srinath Sridharan, Michael DeBole, Guangyu Sun, Yu...
EUROPAR
1999
Springer
14 years 1 months ago
An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors
Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism ILP techniques that are traditionally used in high perform...
Daniel A. Connors, Jean-Michel Puiatti, David I. A...
DAC
1994
ACM
14 years 1 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas