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» Verifying VLSI Circuits
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ISLPED
1999
ACM
177views Hardware» more  ISLPED 1999»
13 years 12 months ago
Low power synthesis of dual threshold voltage CMOS VLSI circuits
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
Vijay Sundararajan, Keshab K. Parhi

Lecture Notes
1962views
15 years 7 months ago
Lectures on VLSI and Integrated Circuit Design
VLSI (Very Large Scale Integration) CMOS (Complementary Metal Oxide Semiconductor) technology is the main driver of our digital revolution. The goals of these lecture are to learn ...
Sherief Reda
DATE
2000
IEEE
86views Hardware» more  DATE 2000»
13 years 12 months ago
A New Partitioning Method for Parallel Simulation of VLSI Circuits on Transistor Level
Simulation is still one of the most important subtasks when designing a VLSI circuit. However, more and more elements on a chip increase simulation runtimes. Especially on transis...
Norbert Fröhlich, Volker Gloeckel, Josef Flei...
ASPDAC
2006
ACM
97views Hardware» more  ASPDAC 2006»
14 years 1 months ago
SASIMI: sparsity-aware simulation of interconnect-dominated circuits with non-linear devices
We present a technique for the fast and accurate simulation of largescale VLSI interconnects with nonlinear devices, called SASIMI. The numerical efficiency of this technique is ...
Jitesh Jain, Stephen Cauley, Cheng-Kok Koh, Venkat...
ICCAD
1994
IEEE
115views Hardware» more  ICCAD 1994»
13 years 11 months ago
Fast transient power and noise estimation for VLSI circuits
Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
Wolfgang T. Eisenmann, Helmut E. Graeb