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1093
search results - page 26 / 219
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Verifying VLSI Circuits
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ISCAS
1999
IEEE
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VLSI circuits with fractal layout for spatial image decorrelation
14 years 1 months ago
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Stefano Rovetta, Rodolfo Zunino
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VTS
1999
IEEE
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Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
14 years 1 months ago
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historical.ncstrl.org
Andreas G. Veneris, Ibrahim N. Hajj, Srikanth Venk...
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ITC
1998
IEEE
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A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits
14 years 29 days ago
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Wen-Ben Jone, Jiann-Chyi Rau, Shih-Chieh Chang, Yu...
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ISCAS
1993
IEEE
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Clock Distribution Design in VLSI Circuits. An Overview
14 years 25 days ago
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Eby G. Friedman
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ISCAS
1994
IEEE
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Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits
14 years 25 days ago
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Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj
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