1093 search results - page 71 / 219 » Verifying VLSI Circuits |
VLSID
2004
IEEE
14 years 10 months ago
2004
IEEE
Abstract--A novel input and output biasing circuit to extend the input common mode (CM) voltage range and the output swing to rail-to-rail in a low voltage op-amp in standard CMOS ...
VLSID
2002
IEEE
14 years 10 months ago
2002
IEEE
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
IOLTS
2005
IEEE
14 years 3 months ago
2005
IEEE
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
GLVLSI
2005
IEEE
14 years 3 months ago
2005
IEEE
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
DFT
2006
IEEE
13 years 12 months ago
2006
IEEE
As the technology enters the nano dimension, the inherent unreliability of nanoelectronics is making fault-tolerant architectures increasingly necessary in building nano systems. ...