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ICRA
2006
IEEE
93views Robotics» more  ICRA 2006»
14 years 2 months ago
A SVM-based Method for Engine Maintenance Strategy Optimization
— Due to the abundant application background, the optimization of maintenance problem has been extensively studied in the past decades. Besides the well-known difficulty of larg...
Qing-Shan Jia, Qianchuan Zhao
HPCA
2008
IEEE
14 years 8 months ago
PEEP: Exploiting predictability of memory dependences in SMT processors
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
Samantika Subramaniam, Milos Prvulovic, Gabriel H....
PPOPP
2009
ACM
14 years 9 months ago
Atomic quake: using transactional memory in an interactive multiplayer game server
Transactional Memory (TM) is being studied widely as a new technique for synchronizing concurrent accesses to shared memory data structures for use in multi-core systems. Much of ...
Adrián Cristal, Eduard Ayguadé, Fera...
MICRO
2009
IEEE
159views Hardware» more  MICRO 2009»
14 years 3 months ago
Adaptive line placement with the set balancing cache
Efficient memory hierarchy design is critical due to the increasing gap between the speed of the processors and the memory. One of the sources of inefficiency in current caches is...
Dyer Rolán, Basilio B. Fraguela, Ramon Doal...
MTDT
2003
IEEE
164views Hardware» more  MTDT 2003»
14 years 1 months ago
Applying Defect-Based Test to Embedded Memories in a COT Model
ct Defect-based testing for digital logic concentrates primarily on methods of test application, including for example at-speed structural tests and IDDQ testing. In contrast, defe...
Robert C. Aitken