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ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
It is common wisdom that synthesizing hardware from higher-level descriptions than Verilog will incur a performance penalty. The case study here shows that this need not be the ca...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
This paper introduces an efficient and accurate interconnect simulation technique. A new formulation for typical VLSI interconnect structures is proposed which, in addition to pr...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
In this paper, we have analyzed ond modeled the fiilure probabilities ofSRAM cells due to process parameter variations. A method to predict the yield of a memoiy chip based on the...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
This paper presents a chip-level charged device model (CDM) electrostatic discharge (ESD) simulation method. The chip-level simulation is formulated as a DC analysis problem. A ne...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
In this paper we describe a stochastic integral equation method for computing the mean value and the variance of capacitance of interconnects with random surface roughness. An ens...