Sciweavers

    221 search results - page 41 / 45
    » isca 2008
    Sort
    View
    ISCA
    2008
    IEEE
    185views Hardware» more  ISCA 2008»
    From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware
    13 years 8 months ago
    From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware
    Download  www.cs.ucsb.edu
    Dynamic information flow tracking (also known as taint tracking) is an appealing approach to combat various security attacks. However, the performance of applications can severely...
    Haibo Chen, Xi Wu, Liwei Yuan, Binyu Zang, Pen-Chu...
    claim paper
    Read More »
    ISCA
    2008
    IEEE
    114views Hardware» more  ISCA 2008»
    Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
    14 years 2 months ago
    Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
    Download  groups.csail.mit.edu
    Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
    Jae W. Lee, Man Cheuk Ng, Krste Asanovic
    claim paper
    Read More »
    ISCAS
    2007
    IEEE
    112views Hardware» more  ISCAS 2007»
    Motion Mapping for MPEG-2 to H.264/AVC Transcoding
    14 years 2 months ago
    Motion Mapping for MPEG-2 to H.264/AVC Transcoding
    Download  www.merl.com
    This paper describes novel motion mapping algorithms aimed for low-complexity MPEG-2 to AVC transcoding. The proposed algorithms efficiently map incoming MPEG-2 motion vectors to...
    Jun Xin, Jianjun Li, Anthony Vetro, Huifang Sun, S...
    claim paper
    Read More »
    TCAD
    1998
    82views more  TCAD 1998»
    LOT: Logic Optimization with Testability. New transformations for logic synthesis
    13 years 8 months ago
    LOT: Logic Optimization with Testability. New transformations for logic synthesis
    Download  www-eda.eit.uni-kl.de
    —A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
    Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
    claim paper
    Read More »
    TCAD
    1998
    91views more  TCAD 1998»
    Cost-free scan: a low-overhead scan path design
    13 years 8 months ago
    Cost-free scan: a low-overhead scan path design
    Download  www.cecs.uci.edu
    Conventional scan design imposes considerable area and delay overhead by using larger scan ip- ops and additional scan wires without utilizing the functionality of the combinatio...
    Chih-Chang Lin, Malgorzata Marek-Sadowska, Mike Ti...
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.