A deterministic BIST scheme for circuits with multiple scan paths is presented. A procedure is described for synthesizing a pattern generator which stimulates all scan chains simu...
Automated fault diagnosis based on the stuckat fault model is not always effective. This paper presents practical experiences in applying a bridging fault based diagnosis techniqu...
Jayashree Saxena, Kenneth M. Butler, Hari Balachan...
New methodologies based on functional testing and built-in self-test can narrow the gap between necessary solutions and existing techniques for processor validation and testing. W...
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Abstract - This paper addresses the issue of the stimulation of charge-pump phase-locked loops for built-in selftest applications. It is shown that three nodes of the PLL qualify f...