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ITC
1998
IEEE
77views Hardware» more  ITC 1998»
13 years 11 months ago
Deterministic BIST with multiple scan chains
A deterministic BIST scheme for circuits with multiple scan paths is presented. A procedure is described for synthesizing a pattern generator which stimulates all scan chains simu...
Gundolf Kiefer, Hans-Joachim Wunderlich
ITC
1998
IEEE
117views Hardware» more  ITC 1998»
13 years 11 months ago
On applying non-classical defect models to automated diagnosis
Automated fault diagnosis based on the stuckat fault model is not always effective. This paper presents practical experiences in applying a bridging fault based diagnosis techniqu...
Jayashree Saxena, Kenneth M. Butler, Hari Balachan...
ITC
1998
IEEE
95views Hardware» more  ITC 1998»
13 years 11 months ago
Native mode functional test generation for processors with applications to self test and design validation
New methodologies based on functional testing and built-in self-test can narrow the gap between necessary solutions and existing techniques for processor validation and testing. W...
Jian Shen, Jacob A. Abraham
ITC
1998
IEEE
61views Hardware» more  ITC 1998»
13 years 11 months ago
Test session oriented built-in self-testable data path synthesis
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Han Bin Kim, Takeshi Takahashi, Dong Sam Ha
ITC
1998
IEEE
59views Hardware» more  ITC 1998»
13 years 11 months ago
Stimulus generation for built-in self-test of charge-pump phase-locked loops
Abstract - This paper addresses the issue of the stimulation of charge-pump phase-locked loops for built-in selftest applications. It is shown that three nodes of the PLL qualify f...
Benoît R. Veillette, Gordon W. Roberts