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A Dual Dielectric Approach for Performance Aware Gate Tunneling Reduction in Combinational Circuits
16 years 1 months ago
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Valmiki Mukherjee, Saraju P. Mohanty, Elias Kougia...
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Formal Verification and its Impact on the Snooping versus Directory Protocol Debate
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Milo M. K. Martin
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Fault Tolerant Asynchronous Adder through Dynamic Self-reconfiguration
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Song Peng, Rajit Manohar
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Storage assignment during high-level synthesis for configurable architectures
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Wenrui Gong, Gang Wang, Ryan Kastner
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Dynamic voltage scaling for the schedulability of jitter-constrained real-time embedded systems
16 years 1 months ago
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Bren Mochocki, Razvan Racu, Rolf Ernst
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