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    FPL
    2006
    Springer
    127views Hardware» more  FPL 2006»
    On-FPGA Communication Architectures and Design Factors
    14 years 3 months ago
    On-FPGA Communication Architectures and Design Factors
    Download  cas.ee.ic.ac.uk
    The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
    Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
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    ASPDAC
    2009
    ACM
    117views Hardware» more  ASPDAC 2009»
    Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications
    14 years 4 months ago
    Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications
    Download  www.engr.colostate.edu
    – The phenomenon of digital convergence and increasing application complexity today is motivating the design of chip multiprocessor (CMP) applications with multiple use cases. Mo...
    Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi
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    ICCAD
    2002
    IEEE
    141views Hardware» more  ICCAD 2002»
    A hierarchical modeling framework for on-chip communication architectures
    14 years 8 months ago
    A hierarchical modeling framework for on-chip communication architectures
    Download  www.ece.neu.edu
    — The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
    Xinping Zhu, Sharad Malik
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    ICCD
    2004
    IEEE
    113views Hardware» more  ICCD 2004»
    Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems
    14 years 8 months ago
    Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems
    Download  www.ece.cmu.edu
    Abstract - This paper describes a communicationcentric design methodology that addresses the fundamental challenges induced by the emergence of truly heterogeneous Systems-on-Chip ...
    Radu Marculescu, Diana Marculescu, Larry T. Pilegg...
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    DAC
    2005
    ACM
    240views Computer Architecture» more  DAC 2005»
    FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology
    15 years 12 days ago
    FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology
    Download  esdat.ucsd.edu
    In this paper, we describe FLEXBUS, a flexible, high-performance onchip communication architecture featuring a dynamically configurable topology. FLEXBUS is designed to detect run...
    Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
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