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SIGMETRICS
1987
ACM
102views Hardware» more  SIGMETRICS 1987»
14 years 3 months ago
Delay Analysis of a Window Tree Conflict Resolution Algorithm in a Local Area Network Environment
Expressions are found for the throughput and delay performance of a Tree Conflict Resolution Algorithm that is used in a Local Area Network with carrier sensing (and possibly also ...
George C. Polyzos, Mart Molle
ISCA
1987
IEEE
65views Hardware» more  ISCA 1987»
14 years 3 months ago
Performance Studies of a Parallel Prolog Architecture
This paper presents a new multiprocessor architecture for the parallel execution of logic programs, developed as part of the Aquarius Project. This architecture is designed to sup...
Barry S. Fagin, Alvin M. Despain
ITC
1994
IEEE
136views Hardware» more  ITC 1994»
14 years 3 months ago
An Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms
Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza ...
ITC
1994
IEEE
82views Hardware» more  ITC 1994»
14 years 3 months ago
Making the Circular Self-Test Path Technique Effective for Real Circuits
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
ISCAS
1994
IEEE
60views Hardware» more  ISCAS 1994»
14 years 3 months ago
Low-Voltage Low-Power Fully-Integratable Automatic Gain Controls
This paper discusses the design of low-voltage low-power fully-integratable automatic gain controls. Four different AGCs are presented, all consisting of three elementary building...
Wouter A. Serdijn, Albert C. van der Woerd, Jan Da...
SIGMETRICS
1991
ACM
14 years 3 months ago
Implementing Stack Simulation for Highly-Associative Memories
Prior to this work, all implementations of stack simulation [MGS70] required more than linear time to process an address trace. In particular these implementations are often slow ...
Yul H. Kim, Mark D. Hill, David A. Wood
SIGMETRICS
1991
ACM
126views Hardware» more  SIGMETRICS 1991»
14 years 3 months ago
MTOOL: A Method for Detecting Memory Bottlenecks
Aaron J. Goldberg, John L. Hennessy
MICRO
1991
IEEE
94views Hardware» more  MICRO 1991»
14 years 3 months ago
Two-Level Adaptive Training Branch Prediction
Tse-Yu Yeh, Yale N. Patt
MICRO
1991
IEEE
115views Hardware» more  MICRO 1991»
14 years 3 months ago
Executing Loops on a Fine-Grained MIMD Architecture
- We present techniques for exploiting parallelism extracted from loops on an MIMD system. Parallelism is exploited through parallel execution of instructions on multiple processor...
Sunah Lee, Rajiv Gupta