A machine description facility allows compiler writers to specify machine execution constraints to the optimization and scheduling phases of an instruction-level parallelism (ILP)...
John C. Gyllenhaal, Wen-mei W. Hwu, B. Ramakrishna...
We show how to use recursive function theory to prove Turing universality of finite analog recurrent neural nets, with a piecewise linear sigmoid function as activation function. W...
The ability to detect object size, location and movement is essential for a visual system in either a biological or man made environment. In this paper we present a model for esti...
While technology is changing the face of the world, it itself is changing by leaps and bounds; there is a continuing trend to put more functionality on the same piece of silicon. ...
Thomas W. Williams, Robert H. Dennard, Rohit Kapur...
This paper proposes a Layered Model for boundaryscan testing to help identify opportunities for standardization. Serial Vector Format [1] and an accompanying Application Programmi...
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
A novel approach to testing CMOS digital circuits is presented that is based on an analysis of IDD switching transients on the supply rails and voltage transients at selected test...
James F. Plusquellic, Donald M. Chiarulli, Steven ...