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FPL
2010
Springer
134views Hardware» more  FPL 2010»
13 years 9 months ago
GPU Versus FPGA for High Productivity Computing
Heterogeneous or co-processor architectures are becoming an important component of high productivity computing systems (HPCS). In this work the performance of a GPU based HPCS is c...
David Huw Jones, Adam Powell, Christos-Savvas Boug...
FPL
2010
Springer
105views Hardware» more  FPL 2010»
13 years 9 months ago
Rapid Prototyping of Radiation-Tolerant Embedded Systems on FPGA
F. Restrepo-Calle, A. Martinez-Alvarez, F. R. Palo...
FPL
2010
Springer
147views Hardware» more  FPL 2010»
13 years 9 months ago
Reconfigurable Hardware for Power-over-Fiber Applications
Michael Dreschmann, Michael Hübner, Moritz Ro...
FPL
2010
Springer
124views Hardware» more  FPL 2010»
13 years 9 months ago
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
FPL
2010
Springer
131views Hardware» more  FPL 2010»
13 years 9 months ago
High Density Asynchronous LUT Based on Non-volatile MRAM Technology
Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier ...
FPL
2010
Springer
132views Hardware» more  FPL 2010»
13 years 9 months ago
Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA
Weirong Jiang, Viktor K. Prasanna, Norio Yamagaki
FPL
2010
Springer
188views Hardware» more  FPL 2010»
13 years 9 months ago
SeqHive: A Reconfigurable Computer Cluster for Genome Re-sequencing
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
Kristian Stevens, Henry Chen, Terry Filiba, Peter ...
FPL
2010
Springer
104views Hardware» more  FPL 2010»
13 years 9 months ago
Multiplicative Square Root Algorithms for FPGAs
Abstract--Most current square root implementations for FPGAs use a digit recurrence algorithm which is well suited to their LUT structure. However, recent computing-oriented FPGAs ...
Florent de Dinechin, Mioara Joldes, Bogdan Pasca, ...
FPL
2010
Springer
129views Hardware» more  FPL 2010»
13 years 9 months ago
FPGA Implementations of the Round Two SHA-3 Candidates
Abstract--The second round of the NIST-run public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). This paper present...
Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilt...