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    FPL
    2010
    Springer
    96views Hardware» more  FPL 2010»
    Test Compression for Dynamically Reconfigurable Processors
    13 years 9 months ago
    Test Compression for Dynamically Reconfigurable Processors
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    Hiroaki Inoue, Junya Yamada, Hideyuki Yoneda, Kats...
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    FPL
    2010
    Springer
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    Customized Exposed Datapath Soft-Core Design Flow with Compiler Support
    13 years 9 months ago
    Customized Exposed Datapath Soft-Core Design Flow with Compiler Support
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    Otto Esko, Pekka Jääskeläinen, Pabl...
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    FPL
    2010
    Springer
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    Automation Framework for Large-Scale Regular Expression Matching on FPGA
    13 years 9 months ago
    Automation Framework for Large-Scale Regular Expression Matching on FPGA
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    Thilan Ganegedara, Yi-Hua E. Yang, Viktor K. Prasa...
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    FPL
    2010
    Springer
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    High-Performance Integer Factoring with Reconfigurable Devices
    13 years 9 months ago
    High-Performance Integer Factoring with Reconfigurable Devices
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    Ralf Zimmermann, Tim Güneysu, Christof Paar
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    FPL
    2010
    Springer
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    Dynamically Reconfigurable Vision-Chip Architecture
    13 years 9 months ago
    Dynamically Reconfigurable Vision-Chip Architecture
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    Maki Yasuda, Minoru Watanabe
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    FPL
    2010
    Springer
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    FPGA Based Network Traffic Analysis Using Traffic Dispersion Patterns
    13 years 9 months ago
    FPGA Based Network Traffic Analysis Using Traffic Dispersion Patterns
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    The problem of Network Traffic Classification (NTC) has attracted significant amount of interest in the research community, offering a wide range of solutions at various levels. Th...
    Faisal Khan, Maya Gokhale, Chen-Nee Chuah
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    FPL
    2010
    Springer
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    Pipelined FPGA Adders
    13 years 9 months ago
    Pipelined FPGA Adders
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    Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. Thi...
    Florent de Dinechin, Hong Diep Nguyen, Bogdan Pasc...
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    FPL
    2010
    Springer
    97views Hardware» more  FPL 2010»
    A Reconfigurable Hebbian Eigenfilter for Neurophysiological Spike Train Analysis
    13 years 9 months ago
    A Reconfigurable Hebbian Eigenfilter for Neurophysiological Spike Train Analysis
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    Bo Yu, Terrence S. T. Mak, Xiangyu Li, Fei Xia, Al...
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    FPL
    2010
    Springer
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    A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier
    13 years 9 months ago
    A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier
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    Heiner Giefers, Marco Platzner
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    FPL
    2010
    Springer
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    FPGA-Optimised Uniform Random Number Generators Using LUTs and Shift Registers
    13 years 9 months ago
    FPGA-Optimised Uniform Random Number Generators Using LUTs and Shift Registers
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    David B. Thomas, Wayne Luk
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