GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Given a set of placed blocks, we present an algorithm that minimally spaces the blocks to ensure routability under several assumptions. By performing a binary search on total widt...
FCCM
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions o...
GLVLSI
2010
IEEE
13 years 11 months ago
2010
IEEE
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
GLVLSI
2010
IEEE
13 years 11 months ago
2010
IEEE
We revisit voltage partitioning problem when the mapped voltages of functional units are predetermined. If energy consumption is estimated by formulation E = CV 2 , a published wo...
GLVLSI
2010
IEEE
13 years 11 months ago
2010
IEEE
The paper presents a novel high-level power modeling and estimation framework. The approach is based on a synergic integration of aspect-oriented programming(AOP) and SystemC. Mac...
GLVLSI
2008
IEEE
14 years 15 days ago
2008
IEEE
The main contribution of this work is an analytical model for finding the upper bound on the temperature difference among various locations on the die. The proposed model can be u...
GLVLSI
2008
IEEE
14 years 15 days ago
2008
IEEE
GLVLSI
2008
IEEE
14 years 15 days ago
2008
IEEE
This paper presents a process variation tolerant, SoC ready, 1GS/s, 6 bit flash analog-to-digital converter (ADC) suitable for integration into nanoscale digital CMOS technologie...
FCCM
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...