This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
This paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exerc...
Due to the development of high speed circuits beyond the 2-GHz mark, the significance of automatic test pattern generation for Path Delay Faults (PDFs) drastically increased in t...
— Recently, there is a renewed interest in Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT). This results from the availability of very powerful SA...
— Due to ever increasing design sizes more efficient tools for Automatic Test Pattern Generation (ATPG) are needed. Recently ATPG based on Boolean satisfiability (SAT) has been ...