INFOCOM
2012
IEEE
12 years 2 months ago
2012
IEEE
Abstract—In this paper, we propose to leverage cloud computing to tame resource-poor mobile devices. Specifically, mobile applications can be executed in the mobile device (know...
ESSCIRC
2011
13 years 5 days ago
2011
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
TCAD
2008
14 years 10 days ago
2008
Starting at the 65-nm node, stress engineering to improve the performance of transistors has been a major industry focus. An intrinsic stress source--shallow trench isolation (STI)...
CF
2008
ACM
14 years 2 months ago
2008
ACM
We develop architectural techniques for mitigating the impact of process variability. Our techniques hide the performance effects of slow components--including registers, function...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
ASPDAC
2007
ACM
14 years 4 months ago
2007
ACM
- A 16-bit THUMB instruction set microprocessor is proposed for low cost/power in short-precision computing. It achieves 40% gate count, 51% power consumption and 160% clock freque...
RTSS
1998
IEEE
14 years 4 months ago
1998
IEEE
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
MICRO
2000
IEEE
14 years 4 months ago
2000
IEEE
A machine’s performance is the product of its IPC (Instructions Per Cycle) and clock frequency. Recently, Palacharla, Jouppi, and Smith [3] warned that the dynamic instruction s...
ASPDAC
2006
ACM
14 years 6 months ago
2006
ACM
– We propose improvement of the new architecture of digital FM demodulator. This work enhances signal quality, system clock frequency, and superior than well known PLL technique ...