ICCAD
1996
IEEE
14 years 5 months ago
1996
IEEE
A scan-based BIST scheme is presented which guarantees complete fault coverage with very low hardware overhead. A probabilistic analysis shows that the output of an LFSR which fee...
DAC
1998
ACM
14 years 5 months ago
1998
ACM
This papers describes a new, fast and economical methodology to test linear analog circuits based on adaptive algorithms. To the authors knowledge, this is the first time such tec...
ITC
1998
IEEE
14 years 5 months ago
1998
IEEE
A deterministic BIST scheme for circuits with multiple scan paths is presented. A procedure is described for synthesizing a pattern generator which stimulates all scan chains simu...
DATE
2007
IEEE
14 years 7 months ago
2007
IEEE
Future microprocessors will be highly susceptible to transient errors as the sizes of transistors decrease due to CMOS scaling. Prior techniques advocated full scale structural or...