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HPCA
2008
IEEE
14 years 7 months ago
C-Oracle: Predictive thermal management for data centers
Designing thermal management policies for today's power-dense server clusters is currently a challenge, since it is difficult to predict the exact temperature and performance...
Luiz Ramos, Ricardo Bianchini
HPCA
2008
IEEE
14 years 7 months ago
Cluster-level feedback power control for performance optimization
Power control is becoming a key challenge for effectively operating a modern data center. In addition to reducing operating costs, precisely controlling power consumption is an es...
Xiaorui Wang, Ming Chen
HPCA
2008
IEEE
14 years 7 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
HPCA
2008
IEEE
14 years 7 months ago
Address-branch correlation: A novel locality for long-latency hard-to-predict branches
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zho...
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HPCA
2008
IEEE
14 years 7 months ago
Regional congestion awareness for load balance in networks-on-chip
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
Paul Gratz, Boris Grot, Stephen W. Keckler
HPCA
2008
IEEE
14 years 7 months ago
PEEP: Exploiting predictability of memory dependences in SMT processors
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
Samantika Subramaniam, Milos Prvulovic, Gabriel H....
HPCA
2008
IEEE
14 years 7 months ago
Thread-safe dynamic binary translation using transactional memory
Dynamic binary translation (DBT) is a runtime instrumentation technique commonly used to support profiling, optimization, secure execution, and bug detection tools for application...
JaeWoong Chung, Michael Dalton, Hari Kannan, Chris...
HPCA
2008
IEEE
14 years 7 months ago
A comprehensive approach to DRAM power management
This paper describes a comprehensive approach for using the memory controller to improve DRAM energy efficiency and manage DRAM power. We make three contributions: (1) we describe...
Ibrahim Hur, Calvin Lin
HPCA
2008
IEEE
14 years 7 months ago
EXCES: External caching in energy saving storage systems
Power consumption within the disk-based storage subsystem forms a substantial portion of the overall energy footprint in commodity systems. Researchers have proposed external cach...
Luis Useche, Jorge Guerra, Medha Bhadkamkar, Mauri...
HPCA
2008
IEEE
14 years 7 months ago
Automated microprocessor stressmark generation
Estimating the maximum power and thermal characteristics of a processor is essential for designing its power delivery system, packaging, cooling, and power/thermal management sche...
Ajay M. Joshi, Lieven Eeckhout, Lizy Kurian John, ...