VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
A technique for signature based diagnosis using windows of different sizes is presented. It allows to obtain increased diagnostic information from a given test at a lower cost, wi...
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
In this paper, a new logic synthesis method for an AND-XOR-OR type sense-amplifying PLA is proposed. An AND-XOR-OR type sense-amplifying PLA can achieve lowpower dissipation and h...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...
24
Voted
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
CN4011A is IEEE 1394a_2000 standard Compliant Physical Layer ASIC. It is a 0.18um mixed-signal ASIC incorporating three analog ports, PLL, reference generator for analog along wit...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
In this paper, we propose a hierarchical timing-driven Steiner tree algorithm for global routing which considers the minimization of timing delay during the tree construction as t...