Sciweavers

DAC
2010
ACM
13 years 11 months ago
Networks on Chips: from research to products
Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address th...
Giovanni De Micheli, Ciprian Seiculescu, Srinivasa...
DAC
2010
ACM
13 years 11 months ago
An efficient algorithm to verify generalized false paths
Timing exception verification has become a center of interest as incorrect constraints can lead to chip failures. Proving that a false path is valid or not is a difficult problem ...
Olivier Coudert
DAC
2010
ACM
13 years 11 months ago
Towards scalable system-level reliability analysis
State-of-the-art automatic reliability analyses as used in system-level design approaches mainly rely on Binary Decision Diagrams (BDDs) and, thus, face two serious problems: (1) ...
Michael Glaß, Martin Lukasiewycz, Christian ...
DAC
2010
ACM
13 years 11 months ago
Cyber-physical systems: the next computing revolution
Ragunathan Rajkumar, Insup Lee, Lui Sha, John A. S...
DAC
2010
ACM
13 years 11 months ago
Theoretical analysis of gate level information flow tracking
Understanding the flow of information is an important aspect in computer security. There has been a recent move towards tracking information in hardware and understanding the flow...
Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Tim...
DAC
2010
ACM
13 years 11 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...
DAC
2010
ACM
13 years 11 months ago
Performance yield-driven task allocation and scheduling for MPSoCs under process variation
With the ever-increasing transistor variability in CMOS technology, it is essential to integrate variation-aware performance analysis into the task allocation and scheduling proce...
Lin Huang, Qiang Xu
DAC
2010
ACM
13 years 11 months ago
Circuit modeling for practical many-core architecture design exploration
Current tools for computer architecture design lack standard support for multi- and many-core development. We propose using circuit models to describe the multiple processor archi...
Dean Truong, Bevan M. Baas
DAC
2010
ACM
13 years 11 months ago
An efficient phase detector connection structure for the skew synchronization system
Clock skew optimization continues to be an important concern in circuit designs. To overcome the influence caused by PVT variations, the automatic skew synchronization scheme can ...
Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih...