DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
Resonant clocking holds the promise of trading speed for energy in CMOS circuits that can afford to operate at low frequency, like hearing aids. An experimental chip with 110k tra...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
In this paper a cost effective solution for asynchronous delay-insensitive on-chip communication is proposed. Our solution is based on the Berger coding scheme and allows to obtai...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
This paper presents an innovative approach for analogue and mixed-signal verification. It consists in a “verification kit” that makes use of concepts used in state-of-art digi...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
Variabilities in metal interconnect structures can affect circuit timing performance or even cause function failure in VLSI designs. This paper proposes a method to estimate the ...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
The design of future communication systems with high throughput demands will become a critical task, especially when sophisticated channel coding schemes have to be applied. LDPC ...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
In this paper, different circuit arrangements of Quantumdot Cellular Automata (QCA) are proposed for the so-called coplanar crossing. These arrangements exploit the majority votin...