Sciweavers

DATE
2009
IEEE
114views Hardware» more  DATE 2009»
14 years 6 months ago
Integration of an advanced emergency call subsystem into a car-gateway platform
— Several European research projects in the vehicular area address the enhancement of vehicular safety. In the frame of the Caring Cars project, an on-board car-gateway embedded ...
Natividad Martínez Madrid, Ralf Seepold, A....
DATE
2009
IEEE
92views Hardware» more  DATE 2009»
14 years 6 months ago
WCRT algebra and interfaces for esterel-style synchronous processing
—The synchronous model of computation together with a suitable execution platform facilitates system-level timing predictability. This paper introduces an algebraic framework for...
Michael Mendler, Reinhard von Hanxleden, Claus Tra...
DATE
2009
IEEE
147views Hardware» more  DATE 2009»
14 years 6 months ago
Decoupling capacitor planning with analytical delay model on RLC power grid
— Decoupling capacitors (decaps) are typically used to reduce the noise in the power supply network. Because the delay of gates and interconnects is affected by the supply voltag...
Ye Tao, Sung Kyu Lim
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
14 years 6 months ago
An event-guided approach to reducing voltage noise in processors
Abstract—Supply voltage fluctuations that result from inductive noise are increasingly troublesome in modern microprocessors. A voltage “emergency”, i.e., a swing beyond tol...
Meeta Sharma Gupta, Vijay Janapa Reddi, Glenn H. H...
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
14 years 6 months ago
Flow regulation for on-chip communication
Abstract—We propose (σ, ρ)-based flow regulation as a design instrument for System-on-Chip (SoC) architects to control quality-of-service and achieve cost-effective communicat...
Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alista...
DATE
2009
IEEE
135views Hardware» more  DATE 2009»
14 years 6 months ago
System-level hardware-based protection of memories against soft-errors
We present a hardware-based approach to improve the resilience of a computer system against the errors occurred in the main memory with the help of error detecting and correcting ...
Valentin Gherman, Samuel Evain, Mickael Cartron, N...
DATE
2009
IEEE
118views Hardware» more  DATE 2009»
14 years 6 months ago
Gate sizing for large cell-based designs
—Today, many chips are designed with predefined discrete cell libraries. In this paper we present a new fast gate sizing algorithm that works natively with discrete cell choices...
Stephan Held
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
14 years 6 months ago
Response-time analysis of arbitrarily activated tasks in multiprocessor systems with shared resources
—As multiprocessor systems are increasingly used in real-time environments, scheduling and synchronization analysis of these platforms receive growing attention. However, most kn...
Mircea Negrean, Simon Schliecker, Rolf Ernst
DATE
2009
IEEE
85views Hardware» more  DATE 2009»
14 years 6 months ago
Faster SAT solving with better CNF generation
Boolean satisfiability (SAT) solving has become an enabling technology with wide-ranging applications in numerous disciplines. These applications tend to be most naturally encode...
Benjamin Chambers, Panagiotis Manolios, Daron Vroo...