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    DAC
    2003
    ACM
    136views Computer Architecture» more  DAC 2003»
    High-level synthesis of asynchronous systems by data-driven decomposition
    15 years 15 days ago
    High-level synthesis of asynchronous systems by data-driven decomposition
    Download  www.async.caltech.edu
    Catherine G. Wong, Alain J. Martin
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    DAC
    2003
    ACM
    154views Computer Architecture» more  DAC 2003»
    Death, taxes and failing chips
    15 years 15 days ago
    Death, taxes and failing chips
    Download  www.research.ibm.com
    In the way they cope with variability, present-day methodologies are onerous, pessimistic and risky, all at the same time! Dealing with variability is an increasingly important as...
    Chandu Visweswariah
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    DAC
    2003
    ACM
    132views Computer Architecture» more  DAC 2003»
    A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEM
    15 years 15 days ago
    A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEM
    Download  www.mit.edu
    In this paper we propose a method for generating reduced models for a class of nonlinear dynamical systems, based on truncated balanced realization (TBR) algorithm and a recently ...
    Dmitry Vasilyev, Michal Rewienski, Jacob White
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    DAC
    2003
    ACM
    156views Computer Architecture» more  DAC 2003»
    Implications of technology scaling on leakage reduction techniques
    15 years 15 days ago
    Implications of technology scaling on leakage reduction techniques
    Download  www.cse.psu.edu
    The impact of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) is evaluated by determining limit...
    Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishn...
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    DAC
    2003
    ACM
    129views Computer Architecture» more  DAC 2003»
    Using a formal specification and a model checker to monitor and direct simulation
    15 years 15 days ago
    Using a formal specification and a model checker to monitor and direct simulation
    Download  network.ku.edu.tr
    We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
    Serdar Tasiran, Yuan Yu, Brannon Batson
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    DAC
    2003
    ACM
    133views Computer Architecture» more  DAC 2003»
    Partial task assignment of task graphs under heterogeneous resource constraints
    15 years 15 days ago
    Partial task assignment of task graphs under heterogeneous resource constraints
    Download  www.cs.lth.se
    This paper presents a novel partial assignment technique (PAT) that decides which tasks should be assigned to the same resource without explicitly defining assignment of these tas...
    Radoslaw Szymanek, Krzysztof Kuchcinski
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    DAC
    2003
    ACM
    128views Computer Architecture» more  DAC 2003»
    Power grid reduction based on algebraic multigrid principles
    15 years 15 days ago
    Power grid reduction based on algebraic multigrid principles
    Download  www.research.ibm.com
    With the scaling of technology, power grid noise is becoming increasingly significant for circuit performance. A typical power grid circuit contains millions of linear elements, m...
    Haihua Su, Emrah Acar, Sani R. Nassif
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    DAC
    2003
    ACM
    148views Computer Architecture» more  DAC 2003»
    Dynamic hardware/software partitioning: a first approach
    15 years 15 days ago
    Dynamic hardware/software partitioning: a first approach
    Download  www.cs.ucr.edu
    Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
    Greg Stitt, Roman L. Lysecky, Frank Vahid
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    DAC
    2003
    ACM
    156views Computer Architecture» more  DAC 2003»
    Using estimates from behavioral synthesis tools in compiler-directed design space exploration
    15 years 15 days ago
    Using estimates from behavioral synthesis tools in compiler-directed design space exploration
    Download  www.isi.edu
    This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
    Byoungro So, Pedro C. Diniz, Mary W. Hall
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    DAC
    2003
    ACM
    173views Computer Architecture» more  DAC 2003»
    An O(nlogn) time algorithm for optimal buffer insertion
    15 years 15 days ago
    An O(nlogn) time algorithm for optimal buffer insertion
    Download  dropzone.tamu.edu
    The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...
    Weiping Shi, Zhuo Li
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