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FPL
2010
Springer
106views Hardware» more  FPL 2010»
13 years 10 months ago
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity...
Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, T...
FMAM
2010
157views Formal Methods» more  FMAM 2010»
13 years 10 months ago
An Experience on Formal Analysis of a High-Level Graphical SOA Design
: In this paper, we present the experience gained with the participation in a case study in which a novel high-level design language (UML4SOA) was used to produce a service-oriente...
Maurice H. ter Beek, Franco Mazzanti, Aldi Sulova
ASPDAC
2010
ACM
152views Hardware» more  ASPDAC 2010»
13 years 10 months ago
Slack redistribution for graceful degradation under voltage overscaling
Modern digital IC designs have a critical operating point, or "wall of slack", that limits voltage scaling. Even with an errortolerance mechanism, scaling voltage below a...
Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, Jo...
VLSI
2010
Springer
13 years 10 months ago
Design of low-complexity and high-speed digital Finite Impulse Response filters
—In this paper, we introduce a design methodology to implement low-complexity and high-speed digital Finite Impulse Response (FIR) filters. Since FIR filters suffer from a larg...
Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paul...
JITECH
2010
116views more  JITECH 2010»
13 years 11 months ago
Design theory for dynamic complexity in information infrastructures: the case of building internet
We propose a design theory that tackles dynamic complexity in the design for Information Infrastructures (IIs) defined as a shared, open, heterogeneous and evolving socio-technica...
Ole Hanseth, Kalle Lyytinen
INFOCOM
2010
IEEE
13 years 11 months ago
A Systematic Approach for Evolving VLAN Designs
—Enterprise networks are large and complex, and their designs must be frequently altered to adapt to changing organizational needs. The process of redesigning and reconfiguring ...
Xin Sun, Yu-Wei Eric Sung, Sunil Krothapalli, Sanj...
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
13 years 11 months ago
Combining optimizations in automated low power design
—Starting from sequential programs, we present an approach combining data reuse, multi-level MapReduce, and pipelining to automatically find the most power-efficient designs th...
Qiang Liu, Tim Todman, Wayne Luk
TEC
2002
119views more  TEC 2002»
14 years 2 days ago
Graph-based evolutionary design of arithmetic circuits
Abstract--In this paper, we present an efficient graph-based evolutionary optimization technique called evolutionary graph generation (EGG) and the proposed approach is applied to ...
Dingjun Chen, Takafumi Aoki, Naofumi Homma, Toshik...
TCAD
2002
146views more  TCAD 2002»
14 years 2 days ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier
STTT
1998
130views more  STTT 1998»
14 years 2 days ago
The Practitioner's Guide to Coloured Petri Nets
Abstract. Coloured Petri nets (CP-nets or CPNs) provide a framework for the design, specification, validation, and verification of systems. CP-nets have a wide range of applicati...
Lars Michael Kristensen, Søren Christensen,...