Sciweavers

FPGA
1999
ACM
123views FPGA» more  FPGA 1999»
14 years 3 months ago
Procedural Texture Mapping on FPGAs
Procedural textures can be effectively used to enhance the visual realism of computer rendered images. Procedural textures can provide higher realism for 3-D objects than traditio...
Andy Gean Ye, David M. Lewis
FPGA
1999
ACM
124views FPGA» more  FPGA 1999»
14 years 3 months ago
Don't Care Discovery for FPGA Configuration Compression
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. The configuration compression algorithm presented in our prev...
Zhiyuan Li, Scott Hauck
FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
14 years 3 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
14 years 3 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson
ICCAD
2000
IEEE
104views Hardware» more  ICCAD 2000»
14 years 3 months ago
Diagnosis of Interconnect Faults in Cluster-Based FPGA Architectures
— Fault diagnosis has particular importance in the context of field programmable gate arrays (FPGAs) because faults can be avoided by reconfiguration at almost no real cost. Cl...
Ian G. Harris, Russell Tessier
FPL
2001
Springer
115views Hardware» more  FPL 2001»
14 years 4 months ago
Placing, Routing, and Editing Virtual FPGAs
This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA structures. From a high level FPGA description,...
Loïc Lagadec, Dominique Lavenier, Erwan Fabia...
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
14 years 4 months ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
FPGA
2001
ACM
144views FPGA» more  FPGA 2001»
14 years 4 months ago
The case for registered routing switches in field programmable gate arrays
È × Ö Ö Ø Ö Þ Ý ÔÖÓ Ö ÑÑ Ð ÒØ Ö ÓÒÒ Ø Ø Ø ÓÒØ Ò× ÐÝ Ö × ×Ø Ú Ò Ô Ø Ú Ð Ñ ÒØ׺ Ï Ð Ø ÓÒ¬ ÙÖ Ð ×ØÖÙ ØÙÖ Ó Ø ÒØ Ö ...
Deshanand P. Singh, Stephen Dean Brown
FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
14 years 4 months ago
Mixing buffers and pass transistors in FPGA routing architectures
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
Mike Sheng, Jonathan Rose