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FPGA
1997
ACM
132views FPGA» more  FPGA 1997»
14 years 3 months ago
Wormhole Run-Time Reconfiguration
Configurable Computing Machines (CCMs) are an emerging class of computing platform which provide the computational performance benefits of ASICs, yet retain the flexibility and ra...
Ray Bittner, Peter M. Athanas
FPGA
1997
ACM
120views FPGA» more  FPGA 1997»
14 years 3 months ago
Partially-Dependent Functional Decomposition with Applications in FPGA Synthesis and Mapping
In this paper, we give a necessary and sufficient condition for the existence of partially-dependent functional decomposition and develop new algorithms to compute such decomposi...
Jason Cong, Yean-Yow Hwang
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
14 years 3 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
14 years 3 months ago
A FPGA-Based Implementation of a Fault-Tolerant Neural Architecture for Photon Identification
Event identification in photon counting ICCD detectors requires a high level image analysis which cannot be easily described algorithmically: neural networks are promising to appr...
Monica Alderighi, E. L. Gummati, Vincenzo Piuri, G...
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
14 years 3 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
FPGA
1998
ACM
153views FPGA» more  FPGA 1998»
14 years 3 months ago
SMAP: Heterogeneous Technology Mapping for Area Reduction in FPGAs with Embedded Memory Arrays
It has become clear that large embedded con gurable memory arrays will be essential in future FPGAs. Embedded arrays provide high-density high-speed implementations of the storage...
Steven J. E. Wilton
FPGA
1998
ACM
148views FPGA» more  FPGA 1998»
14 years 3 months ago
Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Ch...
FPGA
1998
ACM
140views FPGA» more  FPGA 1998»
14 years 3 months ago
More Wires and Fewer LUTs: A Design Methodology for FPGAs
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
Atsushi Takahara, Toshiaki Miyazaki, Takahiro Muro...
FPGA
1998
ACM
176views FPGA» more  FPGA 1998»
14 years 3 months ago
A Fast Routability-Driven Router for FPGAs
Three factors are driving the demand for rapid FPGA compilation. First, as FPGAs have grown in logic capacity, the compile computation has grown more quickly than the compute powe...
Jordan S. Swartz, Vaughn Betz, Jonathan Rose
FPGA
1998
ACM
160views FPGA» more  FPGA 1998»
14 years 3 months ago
A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs
In this paper, we present a new retiming-based technology mapping algorithm for look-up table-based eld programmable gate arrays. The algorithm is based on a novel iterative proce...
Peichen Pan, Chih-Chang Lin