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ICCAD
2003
IEEE
154views Hardware» more  ICCAD 2003»
14 years 6 months ago
Length-Matching Routing for High-Speed Printed Circuit Boards
As the clock frequencies used in industrial applications increase, the timing requirements imposed on routing problems become tighter. So, it becomes important to route the nets w...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2003
IEEE
379views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Statistical Gate-Delay Model Considering Intra-Gate Variability
This paper proposes a model for calculating statistical gate-delay variation caused by intra-chip and inter-chip variability. As the variation of individual gate delays directly i...
Ken-ichi Okada, Kento Yamaoka, Hidetoshi Onodera
ICCAD
2003
IEEE
156views Hardware» more  ICCAD 2003»
14 years 6 months ago
Dynamic Data-bit Memory Built-In Self- Repair
Michael Nicolaidis, Nadir Achouri, Slimane Boutobz...
ICCAD
2003
IEEE
115views Hardware» more  ICCAD 2003»
14 years 6 months ago
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
ICCAD
2003
IEEE
115views Hardware» more  ICCAD 2003»
14 years 6 months ago
SOI Transistor Model for Fast Transient Simulation
D. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Eg...
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 6 months ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim
ICCAD
2003
IEEE
161views Hardware» more  ICCAD 2003»
14 years 6 months ago
A General S-Domain Hierarchical Network Reduction Algorithm
This paper presents an efficient method to reduce complexities of a linear network in s-domain. The new method works on circuit matrices directly and reduces the circuit complexi...
Sheldon X.-D. Tan
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
14 years 6 months ago
Fredkin/Toffoli Templates for Reversible Logic Synthesis
Reversible logic has applications in quantum computing, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate...
Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller
ICCAD
2003
IEEE
166views Hardware» more  ICCAD 2003»
14 years 6 months ago
Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems
Ambient Intelligent Systems provide an unexplored hardware platform for executing distributed applications under strict energy constraints. These systems must respond quickly to c...
Diana Marculescu, Nicholas H. Zamora, Phillip Stan...
ICCAD
2003
IEEE
100views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Theory of Non-Deterministic Networks
Both non-determinism and multi-level networks compactly characterize the flexibility allowed in implementing a circuit. A theory for representing and manipulating non-deterministi...
Alan Mishchenko, Robert K. Brayton