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ICCAD
2003
IEEE
190views Hardware» more  ICCAD 2003»
14 years 6 months ago
IDAP: A Tool for High Level Power Estimation of Custom Array Structures
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
14 years 6 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
ICCAD
2003
IEEE
122views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Framework for Designing Reusable Analog Circuits
Dean Liu, Stefanos Sidiropoulos, Mark Horowitz
ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
14 years 6 months ago
Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
Jinfeng Liu, Pai H. Chou
ICCAD
2003
IEEE
219views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Min-Cost Flow Based Detailed Router for FPGAs
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
Seokjin Lee, Yongseok Cheon, Martin D. F. Wong
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
14 years 6 months ago
Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion
In this paper, we study the full-chp interconnect power modeling. ,We show that repeater,insertion is no longer sufficient to achievethe targetfrequencies specifiedhy ITRS, and de...
Weiping Liao, Lei He
ICCAD
2003
IEEE
194views Hardware» more  ICCAD 2003»
14 years 6 months ago
On the Interaction Between Power-Aware FPGA CAD Algorithms
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
Julien Lamoureux, Steven J. E. Wilton
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits
Modeling frequency-dependent nonlinear characteristics of complex analog blocks and subsystems is critical for enabling efficient verification of mixed-signal system designs. Rece...
Peng Li, Xin Li, Yang Xu, Lawrence T. Pileggi
ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
14 years 6 months ago
SAMBA-Bus: A High Performance Bus Architecture for System-on-Chips
A high performance communication architecture, SAMBA-bus, is proposed in this paper. In SAMBA-bus, multiple compatible bus transactions can be performed simultaneously with only a...
Ruibing Lu, Cheng-Kok Koh
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
14 years 6 months ago
Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches
On-chip L1 and L2 caches represent a sizeable fraction of the total power consumption of microprocessors. In deep sub-micron technology, the subthreshold leakage power is becoming...
Nam Sung Kim, David Blaauw, Trevor N. Mudge