Ultra-deep submicron manufacturability impacts physical design (PD) through complex layout rules and large guardbands for process variability; this creates new requirements for ne...
Dynamic Power Management or DPM refers to the problem of judicious application of various low power techniques based on runtime conditions in an embedded system to minimize the to...
As the technology node progresses, thermal problems are becoming more prominent especially in the developing technology of three-dimensional (3D) integrated circuits. The thermal ...
We present an analytic formula for repeater insertion in global interconnects that simultaneously minimizes silicon device area and power dissipation for a given performance qrj,/...
Giuseppe S. Garcea, N. P. van der Meijs, Ralph H. ...
Translating digital signal processing (DSP) software into its finite-precision hardware implementation is often a timeconsuming task. We describe a new static analysis technique ...
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
We have created a stochastic impulse-response (IR) momentextraction algorithm for RC circuit networks. It employs a newly discovered Feynman Sum-over-Paths Postulate. Full paralle...
Yannick L. Le Coz, Dhivya Krishna, Dusan M. Petran...
This work studies the optimality and stability of timing-driven placement algorithms. The contributions of this work include two parts: 1) We develop an algorithm for generating s...
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie,...