ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
General-purpose microprocessors augmented with SIMD execution units enhance multimedia applications by exploiting data level parallelism. However, supporting/overhead related inst...
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
This paper describes an experiment which aims to reveal the potential impact on performance yielded by augmenting a TriMedia-CPU64 processor with a multiple-context FPGA core. We ...
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
A new iterative multiplier based on a self-timed clocking scheme is presented. To reduce the area required for the multiplier, only two CSA rows are iteratively used to complete a...
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
Clock distribution has traditionally been a circuit design problem with negligible micro-architectural impact. However, for clock distribution networks using multiple phase-locked...
ICCD
2001
IEEE
14 years 9 months ago
2001
IEEE
In 1987 Sedlak proposed a modulo multiplication algorithm which is suitable for smart card implementation due to it’s low latency time. It is based on ZDN (zwei_drittel_N) arith...