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CARDIS
2010
Springer
162views Hardware» more  CARDIS 2010»
13 years 12 months ago
On the Design and Implementation of an Efficient DAA Scheme
Abstract. Direct Anonymous Attestation (DAA) is an anonymous digital signature scheme that aims to provide both signer authentication and privacy. One of the properties that makes ...
Liqun Chen, Dan Page, Nigel P. Smart
ARC
2010
Springer
138views Hardware» more  ARC 2010»
13 years 12 months ago
Space and Time Sharing of Reconfigurable Hardware for Accelerated Parallel Processing
High-Performance Reconfigurable Computers (HPRCs) are parallel machines consisting of FPGAs and microprocessors, with the FPGAs used as co-processors. The execution of parallel app...
Esam El-Araby, Vikram K. Narayana, Tarek A. El-Gha...
ARC
2010
Springer
167views Hardware» more  ARC 2010»
13 years 12 months ago
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
Kunjan Patel, Chris J. Bleakley
ARC
2010
Springer
128views Hardware» more  ARC 2010»
13 years 12 months ago
Reconfigurable Polyphase Filter Bank Architecture for Spectrum Sensing
Abstract. This paper presents a brief tutorial and background on implementing filter banks for spectrum sensing. It discusses the advantages of this approach over standard FFT-base...
Suhaib A. Fahmy, Linda Doyle
ARC
2010
Springer
186views Hardware» more  ARC 2010»
13 years 12 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
3DIC
2009
IEEE
178views Hardware» more  3DIC 2009»
13 years 12 months ago
Investigation and comparison of thermal distribution in synchronous and asynchronous 3D ICs
This paper presents an analysis and comparison between synchronous and delay-insensitive asynchronous logic circuits on thermal distributions for investigating novel solutions to t...
Brent Hollosi, Tao Zhang, Ravi Sankar Parameswaran...
3DIC
2009
IEEE
263views Hardware» more  3DIC 2009»
13 years 12 months ago
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Mo Kwa...
ISMVL
2010
IEEE
166views Hardware» more  ISMVL 2010»
14 years 21 hour ago
Non-deterministic Multi-valued Logics--A Tutorial
Non-deterministic multi-valued matrices (Nmatrices) are a new, fruitful and quickly expanding field of research first introduced a few years ago. Since then it has been rapidly ...
Arnon Avron, Anna Zamansky
ISCA
2010
IEEE
247views Hardware» more  ISCA 2010»
14 years 21 hour ago
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
Sunpyo Hong, Hyesoon Kim
ISCA
1990
IEEE
59views Hardware» more  ISCA 1990»
14 years 3 days ago
Dynamic Processor Allocation in Hypercube Computers
Po-Jen Chuang, Nian-Feng Tzeng