Sciweavers

ASPDAC
2006
ACM
173views Hardware» more  ASPDAC 2006»
14 years 12 days ago
Image segmentation and pattern matching based FPGA/ASIC implementation architecture of real-time object tracking
A novel algorithm for object tracking in video pictures, based on image segmentation and pattern matching, as well as its FPGA/ASIC implementation architecture are presented. With ...
K. Yamaoka, Takashi Morimoto, Hidekazu Adachi, Tet...
ASPDAC
2006
ACM
141views Hardware» more  ASPDAC 2006»
14 years 12 days ago
Depth-driven verification of simultaneous interfaces
The verification of modern computing systems has grown to dominate the cost of system design, often with limited success as designs continue to be released with latent bugs. This t...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
ASPDAC
2006
ACM
176views Hardware» more  ASPDAC 2006»
14 years 12 days ago
Closed form solution for optimal buffer sizing using the Weierstrass elliptic function
Abstract-- This paper presents a fundamental result on buffer sizing. Given an interconnection wire with n buffers evenly spaced along the wire, we would like to size all buffers s...
Sebastian Vogel, Martin D. F. Wong
ASPDAC
2006
ACM
128views Hardware» more  ASPDAC 2006»
14 years 12 days ago
FastPlace 2.0: an efficient analytical placer for mixed-mode designs
Abstract-- In this paper, we present FastPlace 2.0
Natarajan Viswanathan, Min Pan, Chris C. N. Chu
ASPDAC
2006
ACM
121views Hardware» more  ASPDAC 2006»
14 years 12 days ago
Efficient early stage resonance estimation techniques for C4 package
- In this paper, we study the relationship between C4 package resonance effects and logical switching timing correlations, which has not been thoroughly investigated in the past. W...
Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hon...
ASPDAC
2006
ACM
145views Hardware» more  ASPDAC 2006»
14 years 12 days ago
FSM-based transaction-level functional coverage for interface compliance verification
Man-Yun Su, Che-Hua Shih, Juinn-Dar Huang, Jing-Ya...
ASPDAC
2006
ACM
128views Hardware» more  ASPDAC 2006»
14 years 12 days ago
A new test and characterization scheme for 10+ GHz low jitter wide band PLL
- This paper presents a new test and characterization scheme for 10+ GHz low jitter wide band PLL in 90 nm partially depleted (PD) Silicon-On-Insulator (SOI) CMOS technology. We me...
Kazuhiko Miki, David Boerstler, Eskinder Hailu, Ji...
ASPDAC
2006
ACM
726views Hardware» more  ASPDAC 2006»
14 years 12 days ago
Newton: a library-based analytical synthesis tool for RF-MEMS resonators
Newton is a library-based CAD tool with an analytical synthesis engine which has been developed to support the direct synthesis of the physical design and an electromechanically eq...
Michael S. McCorquodale, James L. McCann, Richard ...
ASPDAC
2006
ACM
104views Hardware» more  ASPDAC 2006»
14 years 12 days ago
SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar proces
- Technology scaling and sub-wavelength optical lithography is associated with significant process variations. We propose a self-adaptive variable supply-voltage scaling (SAVS) tec...
Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
14 years 12 days ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...