Sciweavers

DATE
2003
IEEE
114views Hardware» more  DATE 2003»
14 years 2 months ago
Software Streaming via Block Streaming
Software streaming allows the execution of streamenabled software on a device even while the transmission/streaming may still be in progress. Thus, the software can be executed wh...
Pramote Kuacharoen, Vincent John Mooney, Vijay K. ...
DATE
2003
IEEE
120views Hardware» more  DATE 2003»
14 years 2 months ago
Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step
Abstract — This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between the delay defect d...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-...
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
14 years 2 months ago
XBM2PLA: A Flexible Synthesis Tool for Extended Burst Mode Machines
This paper describes the results of a new synthesis tool (XBM2PLA) for asynchronous state machines [2]. XBM2PLA generates the boolean functions for an asynchronous circuit. XBM2PL...
Oliver Kraus, Martin Padeffke
DATE
2003
IEEE
89views Hardware» more  DATE 2003»
14 years 2 months ago
Heterogeneous Programmable Logic Block Architectures
In this poster, we propose four new heterogeneous programmable logic blocks (PLBs) consisting of a combination of various sizes of look up tables (LUTs), multiplexers (MUXes), and...
Aneesh Koorapaty, Vikas Chandra, K. Y. Tong, Cheta...
DATE
2003
IEEE
118views Hardware» more  DATE 2003»
14 years 2 months ago
Transforming Structural Model to Runtime Model of Embedded Software with Real-Time Constraints
The model-based methodology has proven to be effective for fast and low-cost development of embedded software. In the model-based development process, transforming a software stru...
Sharath Kodase, Shige Wang, Kang G. Shin
DATE
2003
IEEE
103views Hardware» more  DATE 2003»
14 years 2 months ago
Verification of the RF Subsystem within Wireless LAN System Level Simulation
Today’s mobile communication systems use sophisticated signal processing to achieve high transmission rates. Therefore a high complexity in the digital system part as well as ve...
Uwe Knöchel, Thomas Markwirth, Jürgen Ha...
DATE
2003
IEEE
130views Hardware» more  DATE 2003»
14 years 2 months ago
A Technique for High Ratio LZW Compression
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...
Michael J. Knieser, Francis G. Wolff, Christos A. ...
DATE
2003
IEEE
91views Hardware» more  DATE 2003»
14 years 2 months ago
Multithreaded Synchronous Data Flow Simulation
This paper introduces an efficient multithreaded synchronous dataflow (SDF) scheduler that can significantly reduce the running time of multi-rate SDF simulations on multiprocesso...
Johnson S. Kin, José Luis Pino
DATE
2003
IEEE
70views Hardware» more  DATE 2003»
14 years 2 months ago
Runtime Code Parallelization for On-Chip Multiprocessors
Mahmut T. Kandemir, Wei Zhang 0002, Mustafa Karak&...