As power density increases exponentially, runtime regulation of operating temperature by dynamic thermal managements becomes necessary. This paper proposes a novel approach to the...
Pu Liu, Zhenyu Qi, Hang Li, Lingling Jin, Wei Wu, ...
Suppression of leakage current and reduction in device-todevice variability will be key challenges for sub-45nm CMOS technologies. Non-classical transistor structures such as the ...
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
This paper describes a class of FPGA-specific uniform random number generators with a 2k −1 length period, which can provide k random bits per-cycle for the cost of k Lookup Ta...
Designing Systems on-Chip is becoming increasingly popular as die sizes increase and technology sizes decrease. The complexity of integrating different types of Processing Element...