Producing a functionally correct integrated circuit is becoming increasingly difficult. No matter how careful a designer is, there will always be integrated circuits that are fabr...
Aggressive pipelining allows FPGAs to achieve high throughput on many Digital Signal Processing applications. However, cyclic data dependencies in the computation can limit pipeli...
Karl Papadantonakis, Nachiket Kapre, Stephanie Cha...
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
Two FPGA implementations of a Shape Adaptive Discrete Cosine Transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used...
Andrew Kinane, Alan Casey, Valentin Muresan, Noel ...
This paper describes the design and implementation of hardware architectures for posture analysis. Posture analysis is an active research area in computer vision. It can be used i...
The performance of security applications can be greatly improved by accelerating the cryptographic algorithms in hardware. In this paper, an implementation of the Secure Shell (SS...
Ivan Gonzalez, Francisco J. Gomez-Arribas, Sergio ...
SRAM FPGAs are vulnerable to security breaches such as bitstream cloning, reverse-engineering, and tampering. Bitstream encryption and authentication are two most effective and pr...
A methodology for supporting dynamic voltage scaling (DVS) on commercial FPGAs is described. A logic delay measurement circuit (LDMC) is used to determine the speed of an inverter...
C. T. Chow, L. S. M. Tsui, Philip Heng Wai Leong, ...
Although biological visual systems have been widely studied at the physiological, psychophysical and functional levels, our understanding of its signal processing mechanisms is st...
Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K....