Sciweavers

DATE
2006
IEEE
80views Hardware» more  DATE 2006»
14 years 3 months ago
Coverage loss by using space compactors in presence of unknown values
Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Cha...
DATE
2006
IEEE
93views Hardware» more  DATE 2006»
14 years 3 months ago
Software annotations for power optimization on mobile devices
Modern applications for mobile devices, such as multimedia video/audio, often exhibit a common behavior: they process streams of incoming data in a regular, predictable way. The r...
Radu Cornea, Alexandru Nicolau, Nikil D. Dutt
DATE
2006
IEEE
72views Hardware» more  DATE 2006»
14 years 3 months ago
An ultra low-power TLB design
Yen-Jen Chang
DATE
2006
IEEE
89views Hardware» more  DATE 2006»
14 years 3 months ago
Model-based development of in-vehicle software
Mirko Conrad, Heiko Dörr
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
14 years 3 months ago
Thermal resilient bounded-skew clock tree optimization methodology
The existence of non-uniform thermal gradients on the substrate in high performance IC’s can significantly impact the performance of global on-chip interconnects. This issue is...
Ashutosh Chakraborty, Prassanna Sithambaram, Karth...
DATE
2006
IEEE
81views Hardware» more  DATE 2006»
14 years 3 months ago
Lock-free synchronization for dynamic embedded real-time systems
We consider lock-free synchronization for dynamic embedded real-time systems that are subject to resource overloads and arbitrary activity arrivals. We model activity arrival beha...
Hyeonjoong Cho, Binoy Ravindran, E. Douglas Jensen
DATE
2006
IEEE
145views Hardware» more  DATE 2006»
14 years 3 months ago
Building a better Boolean matcher and symmetry detector
Boolean matching is a powerful technique that has been used in technology mapping to overcome the limitations of structural pattern matching. The current basis for performing Bool...
Donald Chai, Andreas Kuehlmann
DATE
2006
IEEE
171views Hardware» more  DATE 2006»
14 years 3 months ago
4G applications, architectures, design methodology and tools for MPSoC
transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
14 years 3 months ago
Two-phase resonant clocking for ultra-low-power hearing aid applications
Resonant clocking holds the promise of trading speed for energy in CMOS circuits that can afford to operate at low frequency, like hearing aids. An experimental chip with 110k tra...
Flavio Carbognani, Felix Bürgin, Norbert Felb...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 3 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer