Sciweavers

DATE
2006
IEEE
75views Hardware» more  DATE 2006»
14 years 3 months ago
GALS networks on chip: a new solution for asynchronous delay-insensitive links
In this paper a cost effective solution for asynchronous delay-insensitive on-chip communication is proposed. Our solution is based on the Berger coding scheme and allows to obtai...
G. Campobello, M. Castano, C. Ciofi, Daniele Manga...
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
14 years 3 months ago
A mixed-signal verification kit for verification of analogue-digital circuits
This paper presents an innovative approach for analogue and mixed-signal verification. It consists in a “verification kit” that makes use of concepts used in state-of-art digi...
Giuseppe Bonfini, Monica Chiavacci, Riccardo Maria...
DATE
2006
IEEE
150views Hardware» more  DATE 2006»
14 years 3 months ago
Advanced receiver algorithms for MIMO wireless communications
Andreas Burg, Moritz Borgmann, Markus Wenk, Christ...
DATE
2006
IEEE
89views Hardware» more  DATE 2006»
14 years 3 months ago
A practical method to estimate interconnect responses to variabilities
Variabilities in metal interconnect structures can affect circuit timing performance or even cause function failure in VLSI designs. This paper proposes a method to estimate the ...
Frank Liu
DATE
2006
IEEE
111views Hardware» more  DATE 2006»
14 years 3 months ago
Disclosing the LDPC code decoder design space
The design of future communication systems with high throughput demands will become a critical task, especially when sophisticated channel coding schemes have to be applied. LDPC ...
Torben Brack, Frank Kienle, Norbert Wehn
DATE
2006
IEEE
103views Hardware» more  DATE 2006»
14 years 3 months ago
Novel designs for thermally robust coplanar crossing in QCA
In this paper, different circuit arrangements of Quantumdot Cellular Automata (QCA) are proposed for the so-called coplanar crossing. These arrangements exploit the majority votin...
Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, ...
DATE
2006
IEEE
140views Hardware» more  DATE 2006»
14 years 3 months ago
A hybrid framework for design and analysis of fault-tolerant architectures
It is anticipated that self assembled ultra-dense nanomemories will be more susceptible to manufacturing defects and transient faults than conventional CMOS-based memories, thus t...
Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Va...
DATE
2006
IEEE
352views Hardware» more  DATE 2006»
14 years 3 months ago
Fast-prototyping using the BTnode platform
The BTnode platform is a versatile and flexible platform for functional prototyping of ad hoc and sensor networks. Based on an Atmel microcontroller, a Bluetooth radio and a low-...
Jan Beutel
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
14 years 3 months ago
Supporting task migration in multi-processor systems-on-chip: a feasibility study
With the advent of multi-processor systems-on-chip, the interest in process migration is again on the rise both in research and in product development. New challenges associated w...
Stefano Bertozzi, Andrea Acquaviva, Davide Bertozz...