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ISCA
2007
IEEE
90views Hardware» more  ISCA 2007»
14 years 3 months ago
Transparent control independence (TCI)
AL-ZAWAWI, AHMED SAMI. Transparent Control Independence (TCI). (Under the direction of Dr. Eric Rotenberg). Superscalar architectures have been proposed that exploit control indep...
Ahmed S. Al-Zawawi, Vimal K. Reddy, Eric Rotenberg...
ISCA
2007
IEEE
182views Hardware» more  ISCA 2007»
14 years 3 months ago
Configurable isolation: building high availability systems with commodity multi-core processors
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...
Nidhi Aggarwal, Parthasarathy Ranganathan, Norman ...
ISCA
2007
IEEE
92views Hardware» more  ISCA 2007»
14 years 3 months ago
Rotary router: an efficient architecture for CMP interconnection networks
Pablo Abad, Valentin Puente, José-Án...
ISCA
2007
IEEE
192views Hardware» more  ISCA 2007»
14 years 3 months ago
Analysis of redundancy and application balance in the SPEC CPU2006 benchmark suite
The recently released SPEC CPU2006 benchmark suite is expected to be used by computer designers and computer architecture researchers for pre-silicon early design analysis. Partia...
Aashish Phansalkar, Ajay Joshi, Lizy Kurian John
ISCA
2007
IEEE
196views Hardware» more  ISCA 2007»
14 years 3 months ago
Anton, a special-purpose machine for molecular dynamics simulation
The ability to perform long, accurate molecular dynamics (MD) simulations involving proteins and other biological macromolecules could in principle provide answers to some of the ...
David E. Shaw, Martin M. Deneroff, Ron O. Dror, Je...
ISCA
2007
IEEE
120views Hardware» more  ISCA 2007»
14 years 3 months ago
Examining ACE analysis reliability estimates using fault-injection
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
Nicholas J. Wang, Aqeel Mahesri, Sanjay J. Patel
ISCA
2007
IEEE
167views Hardware» more  ISCA 2007»
14 years 3 months ago
New cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
Zhenghong Wang, Ruby B. Lee
ISCA
2007
IEEE
130views Hardware» more  ISCA 2007»
14 years 3 months ago
Dynamic prediction of architectural vulnerability from microarchitectural state
Transient faults due to particle strikes are a key challenge in microprocessor design. Driven by exponentially increasing transistor counts, per-chip faults are a growing burden. ...
Kristen R. Walcott, Greg Humphreys, Sudhanva Gurum...
ISCA
2007
IEEE
117views Hardware» more  ISCA 2007»
14 years 3 months ago
ReCycle: : pipeline adaptation to tolerate process variation
Process variation affects processor pipelines by making some stages slower and others faster, therefore exacerbating pipeline unbalance. This reduces the frequency attainable by t...
Abhishek Tiwari, Smruti R. Sarangi, Josep Torrella...
ISCA
2007
IEEE
114views Hardware» more  ISCA 2007»
14 years 3 months ago
Mechanisms for bounding vulnerabilities of processor structures
Concern for the increasing susceptibility of processor structures to transient errors has led to several recent research efforts that propose architectural techniques to enhance r...
Niranjan Soundararajan, Angshuman Parashar, Anand ...