Sciweavers

ISQED
2007
IEEE
109views Hardware» more  ISQED 2007»
14 years 3 months ago
Variation Impact on SER of Combinational Circuits
Krishnan Ramakrishnan, R. Rajaraman, S. Suresh, Na...
ISQED
2007
IEEE
123views Hardware» more  ISQED 2007»
14 years 3 months ago
General Block Structure-Preserving Reduced Order Modeling of Linear Dynamic Circuits
In this paper, we propose a generalized block structure-preserving reduced order interconnect macromodeling method (BSPRIM). Our approach extends structure-preserving model order ...
Ning Mi, Boyuan Yan, Sheldon X.-D. Tan, Jeffrey Fa...
ISQED
2007
IEEE
114views Hardware» more  ISQED 2007»
14 years 3 months ago
Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure
Design verification has become a bottleneck of modern designs. Recently, simulation-based random verification has attracted a lot of interests due to its effectiveness in uncoveri...
Yu-Min Kuo, Cheng-Hung Lin, Chun-Yao Wang, Shih-Ch...
ISQED
2007
IEEE
104views Hardware» more  ISQED 2007»
14 years 3 months ago
A DOE Set for Normalization-Based Extraction of Fill Impact on Capacitances
Andrew B. Kahng, Rasit Onur Topaloglu
ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
14 years 3 months ago
Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems
— In the past, dynamic voltage and frequency scaling (DVFS) has been widely used for power and energy optimization in embedded system design. As thermal issues become increasingl...
Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wa...
ISQED
2007
IEEE
163views Hardware» more  ISQED 2007»
14 years 3 months ago
Variation Analysis of CAM Cells
Process related variations are considered a major concern in emerging sub-65nm technologies. In this paper, we investigate the impact of process variations on different types of c...
Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan,...
ISQED
2007
IEEE
141views Hardware» more  ISQED 2007»
14 years 3 months ago
OPC-Friendly Bus Driven Floorplanning
In this paper, we address the interconnect-driven floorplanning problem that integrates OPC-friendly bus assignment with floorplanning. Buses consist of a number of horizontal/v...
Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. W...
ISQED
2007
IEEE
136views Hardware» more  ISQED 2007»
14 years 3 months ago
Strain Silicon Optimization for Memory and Logic in Nano-Scale CMOS
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...
Rajani Kuchipudi, Hamid Mahmoodi
ISQED
2007
IEEE
146views Hardware» more  ISQED 2007»
14 years 3 months ago
An Exploratory Study on Statistical Timing Analysis and Parametric Yield Optimization
Ayhan A. Mutlu, Kelvin J. Le, Mustafa Celik, Dar-s...