ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
—During the power mode transition, a large surge current may lead to the malfunctions in a power-gating design. In this paper, we introduce several important properties of the s...
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
(Chinese)
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
— As nanometer technology advances, the post-CMP dielectric thickness variation control becomes crucial for manufacturing closure. To improve CMP quality, dummy feature filling ...
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
This paper presents a hybrid compaction scheme for test responses containing unknown values, which consists of a space compactor and an unknown-blocking Multiple Input Signature R...
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
Modern IC designs have reached unparalleled levels of complexity, resulting in more and more bugs discovered after design tape-out However, so far only very few EDA tools for post...
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 8 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
Abstract— Nanoscale technology promises dramatically increased device density, but also decreased reliability. With bit error rates projected to be as high as 10%, designing a us...
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
— We introduce a remote activation scheme that aims to protect integrated circuits (IC) intellectual property (IP) against piracy. Remote activation enables designers to lock eac...
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
ICCAD
2007
IEEE
14 years 8 months ago
2007
IEEE
—In the VLSI design process, a design implementation often needs to be corrected because of new specifications or design constraint violations. This correction process is referre...