This paper analyzes a range of architectures for efficient delivery of VLIW instructions for embedded media kernels. The analysis takes an efficient Filter Cache as a baseline and ...
David Black-Schaffer, James D. Balfour, William J....
We present a study that evaluates the effectiveness of augmenting on-screen instructions with micro-projection for manual task guidance unlike prior work, which replaced screen in...
Stephanie Rosenthal, Shaun K. Kane, Jacob O. Wobbr...
Many binary tools, such as disassemblers, dynamiccode generation systems, and executable code rewriters, need to understand how machine instructions are encoded. Unfortunately, sp...
Three different instruction formats were examined respecting their usefulness for the navigation through hierarchical menus in mobile phones. 56 middle-aged adults had to solve fou...
A vital goal of instruction is to enable learners to transfer acquired knowledge to appropriate future situations. For elementary school children in middle-high-SES schools, “exp...
Stephanie Siler, David Klahr, Cressida Magaro, Kev...
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee...
This paper explores hierarchical instruction scheduling for a tiled processor. Our results show that at the top level of the hierarchy, a simple profile-driven algorithm effective...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
This paper discusses the obstacles that stand in the way of doing a good job of machine-code analysis. Compared with analysis of source code, the challenge is to drop all assumptio...
Thomas W. Reps, Junghee Lim, Aditya V. Thakur, Gog...
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...