—In this paper, we propose a cost-effective and low-power 64-point fast Fourier transform (FFT)/inverse FFT (IFFT) architecture and chip adopting the retrenched 8-point FFT/IFFT ...
Synchronization in networks with different topolo- is shown that for typical systems only three main scenarios gies is studied. We show that for a large class of oscillators there ...
This paper tackles the problem of accelerating The rest of this paper is organised as follows: section II motion estimation for video processing. A novel architecture details relat...
— This paper carves out a way to image compression that is motivated by the recent advancement in image inpainting. An image coding approach is proposed in which a number of regi...
We present a neural recording and spectral analysis RECORDING ANALYSIS integrated microsystem. It is the instrumentational and computa- INTERACE PROCESSOR tional core of an envisio...
J. N. Y. Aziz, Rafal Karakiewicz, Roman Genov, B. ...
Abstract— In this article we present a novel design of a lowpower geometric mapping co-processor that can be used for high-performance graphics system. The processor can carry ou...
— We present analytical formulas for the calculation of the memory requirements for a system using the Complex Logarithmic Number System (CLNS). Certain properties of the CLNS ad...
We examine noise due to clock jitter in single-loop low pass continuous-time delta-sigma modulators employing NRZ feedback DACs. Using the discrete-time version of the Bode sensit...
A novel 0. 13,um CMOS integrated linear voltage to pulse delay time converter (VTC) is proposed. The VTC ml architecture uses current starved inverters where the inverter delay ver...