ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
Abstract— To achieve small delay and low crosstalk for multiple signal nets with capacitive and inductive coupling, we propose in this paper a novel interconnect structure, stagg...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
Reliability decisions taken early in system design can bring significant benefits in terms of design quality. This paper presents a 0-1 integer linear programming (ILP) formulatio...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
This paper proposes a reliability-centric hardware/ software co-design framework. This framework operates with a component library that provides multiple alternates for a given ta...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
Layout migration has re-emerged as an important task due to the increasing use of library hard intellectual properties. While recent advances of migration tools have accommodated ...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
Recently, a new Dynamic Voltage Scaling (DVS) scheme has been proposed that increases energy efficiency significantly by allowing the processor to operate at or slightly below the...
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
ISQED
2005
IEEE
14 years 6 months ago
2005
IEEE
Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, has been modified by introducing a pseudo-nMOS style load. The resultant circuit consumes less power, primar...